With the rapid development of display technique, displays show a development trend of high integration and low cost. The Gate Driver on Array (GOA) technique integrates gate switching circuits of a Thin Film Transistor (TFT) on an array substrate of a display panel to form a scan driving to the display panel, so as to leave out wiring space of a bonding area and a fan-out area of a gate Integrated Circuit (IC), which can not only reduce product cost in two aspects of material cost and manufacturing process, but also achieve symmetry on both sides of the display panel and a beautiful design of a narrow border. Also, such integration technique can eliminate the need of bonding process in a gate scanning line direction, and thus improve productivity and yield.
A GOA circuit usually is composed of a plurality of cascaded shift registers, wherein a driving signal output terminal of the shift register in each stage corresponds to one gate line, respectively, so that respective gate lines are set along a scanning direction. However, among the shift registers employed in most GOA circuits, a node of a switching transistor for controlling an output under control of a clock signal will always be in a floating status. A potential at this node will be affected by leakage of ambient switching transistors, causing that a gate potential of the switching transistor for outputting is unstable, and that a scanning signal outputted by a driving signal output terminal has relatively large noise, thereby affecting a stable output of the shift register.